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Si9139
New Product
Vishay Siliconix
Multi-Output, Individual On/Off Control Power-Supply Controller
FEATURES
D D D D D D D D D D D D D D D Five Output 50-W, Triple Output DC-DC-Controller Up to 95% Efficiency "3% Total Regulation (Line, Load and Temperature) 4.5-V to 30-V Input Voltage Range Two Fixed 1.5-V, 1.8-V, 2.0-V, 2.2-V, 2.5-V, 2.8-V, 3.3-V Outputs One Adjustable 1.24-V to 20-V Output 3.3-V Reference Output 5-V/30-mA Linear Regulator Output Individual ON/OFF Control for A and B Outputs 300-kHz Low-Noise Fixed Frequency Operation High Efficiency Pulse Skipping Mode Operation at Light Load Only Three Inductors RequiredNo Transformer LITTLE FOOTR Optimized Output Drivers Internal Under Voltage Lockout and Soft-Start Minimum Number of External Control Components D D D D 28-Pin SSOP Package Output Overvoltage Protection Output Undervoltage Shutdown Power-Good Output (RESET)
APPLICATIONS
D D D D D D D Notebook and Subnotebook Computers PDAs and Mobile Communicators Portable Display Multimedia Set-Top Box Telecommunications Infrastructure Network Equipment Distributed Power Conversion
DESCRIPTION
The Si9139 is current-mode PWM and PSM converter controller, with two high current, high efficiency synchronous buck controllers and an adjustable buck-boost controller whose output can be set between 1.24 V and 20 V with an external resistor divider. Designed for fixed and portable devices, it offers a total of five power outputs (three tightly regulated dc/dc converter outputs, a precision 3.3-V reference and a 5-V LDO output. Individually controlled power-up sequencing, power-good signal with delay, internal frequency compensation networks and automatic boot-strapping simplify the system by minimizing the number of external components while achieving conversion efficiencies approaching 95%.
The Si9139 is available in a 28-pin SSOP package and specified to operate over the extended commercial (-40_C to 85_C) temperature range.
FUNCTIONAL BLOCK DIAGRAM
VIN (4.5 V to 30 V)
VL (5.0 V)
5-V Linear Regulator
3.3-V Voltage Reference
VREF (+3.3 V)
VOUTA 0-6A
1.5- V - 3.3-V SMPSA
1.8- V - 3.3-V SMPSB
VOUTB 0-6A
Auxiliary SMPS Programmable
VOUTC 1.24-V to 20-V/500 mA Adjustable
ONA ONB
Logic Control
Power_Good
RESET (Power_Good)
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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Si9139
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +36 V PGND to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V VL to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5 V BSTA, BSTB, BSTC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +36 V VL Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous LXA to BSTA; LXB to BSTB; LXC to BSTC . . . . . . . . . . . . . . . . . -6.5 V to 0.3 V Inputs/Outputs to GND (CSA, CSB, CSP, CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to (VL +0.3 V) RESET, ONA, ONB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +5.5 V DLA, DLB, DLC to PGND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to (VL +0.3 V) DHA to LXA, DHB to LXB, DHC to LXC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to (BSTx +0.3 V) Continuous Power Dissipation (TA = 70_C)a 28-Pin SSOPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 762 mW Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40 _C to 85_C Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40 _C to 125_C Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . 300_C Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 9.52 mW/_C above 70_C.
New Product
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
SPECIFICATIONS
Test Conditions Parameter Buck Controller A
Total Regulation (Line, Load, and Temperature) Line Regulation Load Regulation Current Limit Bandwidth Phase Margin Minimum Duty Cycle VIN = 4.5 V to 30 V, 0 < VCS3 - VFB3 < 90 mV VIN = 6.0 V to 30 V VIN = 4.5 V to 30 V 0 < VCS3 - VFB3 < 90 mV VCSA - VFBA L = 10 mH, C = 330 mF RSENSE = 20 mW VOUT > 2.5 V VOUT < 2.5 V 90 100 50 65 7 125 -3 0 3 0.5 1.0 0.5 160 180 mV kHz _ % % VIN = 15 V , IVL = IREF = 0 mA TA = -40_C to 85_C, All Controllers ON
Limits Mina Typb Maxa Unit
Buck Controller B
Total Regulation (Line, Load, and Temperature) Line Regulation Load Regulation Current Limit Bandwidth Phase Margin Minimum Duty Cycle VIN = 4.5 V to 30 V, 0 < VCS5 - VFB5 < 90 mV VIN = 6.0 V to 30 V VIN = 4.5 V to 30 V 0 < VCSB - VFBB < 90 mV VCSB - VFBB L = 10 mH, C = 330 mF RSENSE = 20 mW VOUT > 2.5 V VOUT < 2.5 V 90 100 50 65 7 125 -3 0 3 0.5 1.0 0.5 160 180 mV kHz _ % %
Auxiliary Controller C
Total Regulation (Line, Load, and Temperature) Output Voltage Set to 12 V Line Regulation Load Regulation Current Limit Bandwidth Phase Margin Current-Sense Common Mode Voltage Range Feedback Input Voltage Range Minimum Duty Cycle Maximum Duty Cycle VIN = 5 V VIN = 4.5 V to 30 V, 0 < VCSP - VCSN < 300 mV R5 = 26.4 kW, R6 = 10 kW (See Figure 1) VIN = 6.0 V to 30 V VIN = 4.5 V to 30 V 0 < VCSP - VFBN < 300 mV VCSP - VCSN L = 10 mH, C = 100 mF RSENSE = 100 mW, Ccomp = 120 pF 0.0 0.0 7 85 % 280 360 10 65 2.1 2.1 V -5 0 5 0.5 1.0 0.5 450 mV kHz _ %
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
New Product
SPECIFICATIONS
Test Conditions Parameter Internal 5-V Regulator
VL Output Current (Internal and External) VL Output VL Fault Lockout Voltage VL Fault Lockout Hysteresis All Controllers OFF, VIN >5.5 V, 0 Vishay Siliconix
Limits Mina Typb Maxa Unit
Reference
REF Output REF Load Regulation Auxiliary Feedback Voltage FBC Pin 0 to 1 mA 1.20 3.24 3.3 25 1.24 3.36 60 1.28 V mV V
Supply Current
Supply Current*Shutdown Supply Current*Operation All Converters OFF, No Load All Controllers ON, No Load, fOSC = 300 kHz 25 1100 60 1800 mA m
Oscillator
Oscillator Frequency Maximum Duty Cycle 270 92 300 95 330 kHz %
Fault Detection SMPSA and SMPSB Outputs
Overvoltage Trip Threshold Overvoltage-Fault Propagation Delay Output Undervoltage Threshold Output Undervoltage Lockout Time With Respect To Unloaded Output Voltage CSA or CSB Driven 2% Above Overvoltage Trip Threshold With Respect to Unloaded Output Voltage From each SMPS Enabled -40 16 6 10 1.5 -30 20 -20 24 14 % ms % ms
RESET
RESET Start Threshold RESET Propagation Delay (Falling) RESET Delay Time (Rising) With Respect To Unloaded Output Voltage Rising Edge Falling Edge, FBA or FBB Driven 2% Above Overvoltage or 2% Below Undervoltage Lockout Thresholds With Respect to 2nd SMPS Lockout Time Done 92 -5.5 1.5 107 122 % ms ms
Inputs and Outputs
Feedback Input Leakage Current Input Leakage Current Gate Driver Sink/Source Current (Buck) Gate Driver On-Resistance (Buck) Gate Driver Sink/Source Current (Auxiliary) Gate Driver On-Resistance (Auxiliary) RESET Output Low Voltage RESET Output High Leakage FBC = 1.24 V ONA, ONB, VIN = 0 V or VL DLA, DHA, DLB, DHB Forced to 2 V High or Low DHC, DLC Forced to 2 V High or Low RESET, ISINK = 4 mA RESET = 5 V 1 2 0.2 15 0.4 1 7 1 "1 mA m A W A W V mA
ONA, ONB
Logic Low Logic High VIL VIH 2.4 0.8 V
Notes a. The algebraic convention is used whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing, and are measured at TA = 25_C.
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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Si9139
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PIN CONFIGURATION
New Product
RESET FBC BSTC DHC LXC DLC CSP CSN COMP GND REF ONA ONB CSB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 SSOP-28 Top View
28 27 26 25 24 23 22 21 20 19 18 17 16 15
CSA FBA DHA LXA BSTA DLA VIN VL FBB PGND DLB BSTB LXB DHB
PIN DESCRIPTION
Pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Symbol
RESET FBC BSTC DHC LXC DLC CSP CSN COMP GND REF ONA ONB CSB DHB LXB BSTB DLB PGND FBB VL VIN DLA BSTA LXA DHA FBA CSA
Description
Open drain NMOS output active-low timed reset output. RESET swings GND to VL. Goes high after a fixed 32,000 clock cycle delay following proper power-up of all supply outputs indicating Power_Good. Feedback for Auxiliary controller C. Normally connected to an external resistor divider used to set the Auxiliary output voltage. Boost capacitor connection for Auxiliary SMPS controller C Gate-drive output for Auxiliary SMPS controller C high-side MOSFET Inductor connection for Auxiliary SMPS controller C Gate-drive output for Auxiliary SMPS controller C low-side MOSFET Current sense positive input for Auxiliary SMPS controller C Current sense negative input for Auxiliary SMPS controller C Auxiliary SMPS controller C compensation connection, if required Analog ground 3.3-V internal reference Logic High enables the SMPS controller A Logic High enables the SMPS controller B and the Auxiliary SMPS controller C adjustable SMPS controllers Current sense input for SMPS controller B Gate-drive output for SMPS controller B high-side MOSFET Inductor connection for SMPS controller B Boost capacitor connection for SMPS controller B Gate-drive output for SMPS controller B low-side MOSFET Power ground Feedback for SMPS controller B 5-V logic supply voltage for internal circuitry Input voltage Gate-drive output for SMPS controller A low-side MOSFET Boost capacitor connection for SMPS controller A Gate-drive output for SMPS controller A high-side MOSFET Inductor connection for SMPS controller A low-side MOSFET Feedback for SMPS controller A Current sense input for SMPS controller A
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
New Product
ORDERING INFORMATION
Part Number
Si9139DG - 3328 Si9139DG - 3325 Si9139DG - 3322 Si9139DG - 3320 Si9139DG - 3318 Si9139DG - 3315 Si9139DG - 2825 Si9139DG - 2822 Si9139DG - 2820 Si9139DG - 2818 Si9139DG - 2815 Si9139DG - 2522 Si9139DG - 2520 Si9139DG - 2518 Si9139DG - 2515 Si9139DG - 2220 Si9139DG - 2218 Si9139DG - 2215 Si9139DG - 2018 Si9139DG - 2015 Si9139DG - 1815 Si9139DG -40 to 85_C
Vishay Siliconix
Temperature Range
SMPSB, SMPSA Output Voltages
3.3 V, 2.8 V 3.3 V, 2.5 V 3.3 V, 2.2 V 3.3 V, 2.0 V 3.3 V, 1.8 V 3.3 V, 1.5 V 2.8 V, 2.5 V 2.8 V, 2.2 V 2.8 V, 2.0 V 2.8 V, 1.5 V 2.8 V, 1.8 V 2.5 V, 2.2 V 2.5 V, 2.0 V 2.5 V, 1.8 V 2.5 V, 1.5 V 2.2 V, 2.0 V 2.2 V, 1.8 V 2.2 V, 1.5 V 2.0 V, 1.8 V 2.0 V, 1.5 V 1.8 V, 1.5 V Contact factory for other voltages
Evaluation Board
Si9139DB
Temperature Range
-40 to 85_C
Board Type
Surface Mount
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Efficiency vs. SMPS B Output Current
100 VIN = 5 V 90 VIN = 12 V Efficiency (%) 80 VIN = 24 V 70 SMPS A No Load VOUT = 2.5 V 60 60 Efficiency (%) 75 85
Efficiency vs. Auxiliary SMPS C Output Current (Buck-Boost Configuration)
Frequency = 300 kHz 80 6V 30 V VIN = 15 V
70
65 SMPS A, B No Load VOUT = 12 V
50 0.1 1 Load Current (A) 10
55 0.001 0.01 Current (A) 0.1 1
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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Si9139
Vishay Siliconix
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Efficiency vs. Auxiliary SMPS C Output Current (Buck Configuration)
90 VIN = 5 V 75 80 VIN = 5 V VIN = 12 V 100
Efficiency vs. SMPS B Output Current
60 Efficiency (%)
Efficiency (%)
VIN = 12 V
60
45 VIN = 24 V 30 SMPS A, B No Load VOUT = 2.1 V 15
40 SMPS A No Load VOUT = 12.5 V 20
0 0.01 0.1 1 Output Current (A) 10
0 0.01 0.1 Load Current (A) 1
TYPICAL WAVEFORMS
PWM Loading B Converter
(VIN = 5.0 V, VOUT = 2.5 V) VOUT (100 mV/div)
PWM Unloading B Converter
(VIN = 5.0 V, VOUT = 2.5 V) VOUT (100 mV/div)
Load (1 A/div)
Load (1 A/div)
20.0 ms/div
20.0 ms/div
PSM to PWM B Converter
(VIN = 5.0 V, VOUT = 2.5 V) VOUT (50 mV/div)
PWM to PSM B Converter
(VIN = 5.0 V, VOUT = 2.5 V) VOUT (50 mV/div)
Load (1 A/div) (0.1 A to 1.8 A) (0.1 A to 1.8 A)
Load (1 A/div)
50 ms/div
50 ms/div
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
New Product
TYPICAL WAVEFORMS
Vishay Siliconix
PSM Operation B Converter
V(VIN = 5.0 V, VOUT = 2.5 V) VOUT (20 mV/div)
PSM Operation B Converter
VOUT (20 mV/div) (VIN = 5.0 V, VOUT = 2.5 V)
Inductor Node (LXB) (5 V/div)
Inductor Node (LXB) (5 V/div)
(IOUT = 100 mA) 10.0 ms/div
Inductor Current (0.5 A/div)
(IOUT = 1.2 A)
Inductor Current (0.5 A/div)
10.0 ms/div
PWM Loading B Converter
PWM Unloading A Converter
(VIN = 12.0 V, VOUT = 2.0 V) VOUT (20 mV/div) VOUT (20 mV/div)
(VIN = 12.0 V, VOUT = 2.5 V)
Load (1 A/div) (1.5 A to 4.0 A ) 50 ms/div (1.8 A to 4.3 A ) 50 ms/div
Load (1 A/div)
PSM to PWM A Converter
VVIN = 5.0 V, VOUT = 2.0 V VOUT (50 mV/div)
PWM to PSM A Converter
(VIN = 10.0 V, VOUT = 3.3 V) VOUT (50 mV/div)
Load (1 A/div) (0.1 A to 3.0 A ) 50 ms/div (3 A to 0.1 A ) 50 ms/div
Load (1 A/div)
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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Si9139
Vishay Siliconix
TYPICAL WAVEFORMS
New Product
250-mA Transient Auxiliary Converter C (Buck-Boost Mode--Output Set To 12 V)
VVIN = 10.0 V VOUT (100 mV/div)
Load Current (100 mA/div)
200 ms/div
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
New Product
STANDARD APPLICATION CIRCUIT (BUCK-BOOST AUXILIARY)
VIN 4.5 ~ 30 V
Vishay Siliconix
C7 33 mF CMPD2836 VIN C1 0.1 mF 22 BSTA 24 Q1 Si7888 26 25 LXA
+5 V D1A VL 21 BSTB 17 DHB 15 LXB 16 D1B C2 0.1 mF Q2 Si7888 L1, 10 mH R2 0.02 W C4 33 mF C5 10 mF
DHA
VOUTB C3 330 mF
VOUT
R1 0.02 W
L2 10 mH
A
DLB 18 Q3 Si7886
Q4 Si7886 SS34
SS34 C6 330 mF
23
DLA
CSB 14 FBB 20
CSA 28 BSTC 3 VL DHC 4 LXC 5 20 kW FBA DLC 6 RESET PGND* 1 ONA CSP 7
D3 CMPD2836 C8 0.1 mF C9 4.7 mF Q5 Si3456 L3, 10 mH
D4, BYS10-35
VOUTC 1.24 to 20 V 500 mA C10 100 mF
D2, BYS10-35
27
Q6 Si3456
GND*
12
0.2 W
R3
R5
13
ONB
CSN 8 FBC 2 9 19 C12 120 pF R6
3.3 V 1 mA C11 1 mF
REF 11 GND 10
COMP PGND
*PGND and GND planes should be connected to a single point (star) ground.
Figure 1.A
Document Number: 71841 S-22317--Rev. A, 16-Dec-02 www.vishay.com
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Si9139
Vishay Siliconix
New Product
AUXILIARY IN BOOST MODE) STANDARD APPLICATION CIRCUIT (5-V INPUT
VIN 4.5 ~ 5.5 V
C7 33 mF CMPD2836 VIN C1 0.1 mF 22 BSTA 24 Q1 Si7888 26 25 LXA
D1A VL 21 BSTB 17 DHB 15 LXB 16 D1B C2 0.1 mF Q2 Si7888 L1, 10 mH R2 0.02 W C4 33 mF
DHA
VOUTB C3 330 mF
VOUT
R1 0.02 W
L2 10 mH
A
DLB 18 Q3 Si7886
Q4 Si7886 SS34
SS34 C6 330 mF
23
DLA
CSB 14 FBB 20
CSA 28
VL
L3, 10 mH
D4, BYS10-35
20 kW FBA DLC 6 RESET PGND* 1 ONA CSP 7 0.2 W R3 R5
VOUTC (VIN +0.5 V) to 20 V 500 mA C10 100 mF
27
Q6 Si3456
GND*
12
13
ONB
CSN 8 FBC 2 9 19 C12 120 pF R6
3.3 V 1 mA C11 1 mF
REF 11 GND 10
COMP PGND
*PGND and GND planes should be connected to a single point (star) ground.
Figure 1.B
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Si9139
New Product
STANDARD APPLICATION CIRCUIT (5-V INPUT
VIN 4.5 ~ 5.5 V
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AUXILIARY IN BUCK MODE)
C7 33 mF CMPD2836 VIN C1 0.1 mF 22 BSTA 24 Q1 Si7888 26 25 LXA
D1A VL 21 BSTB 17 DHB 15 LXB 16 D1B C2 0.1 mF Q2 Si7888 L1, 10 mH R2 0.02 W C4 33 mF
DHA
VOUTB C3 330 mF
VOUT
R1 0.02 W
L2 10 mH
A
DLB 18 Q3 Si7886
Q4 Si7886 SS34
SS34 C6 330 mF
23
DLA
CSB 14 FBB 20
CSA 28 BSTC 3 VL DHC 4 LXC 5 20 kW FBA
D3 CMPD2836 C8 0.1 mF Q5 Si3456 L3, 10 mH
R3
VOUTC 1.24 to 2.1 V 500 mA C10 100 mF
D2, BYS10-35
27
RESET PGND* 1 ONA
CSP 7 R5
GND*
12
13
ONB
CSN 8 FBC 2 9 19 C12 120 pF C17 R4
3.3 V 1 mA C11 1 mF
REF 11 GND 10
COMP PGND
R6
*PGND and GND planes should be connected to a single point (star) ground.
Figure 1.C
Document Number: 71841 S-22317--Rev. A, 16-Dec-02 www.vishay.com
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Si9139
Vishay Siliconix
TIMING DIAGRAMS
The converter is enabled ONA or ONB VIN is applied VIN
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LDO is activated after VIN is applied REF circuit is activated after VL becomes available After VREF goes above 0.8 V, the converter is turned on
VL 0.8 V VREF
OSC EN (Sysmon EN)
Oscillator is activated
OSC 4 ms fmax (SS) High-side gate drive duty ratio gradually increases to maximum tBBM Slow soft-start gradually increases the maximum inductor current
DH
DL
Low-side gate drive
FIGURE 2. Converter is Enabled Before VIN is Applied, A or B controllers
The converter is enabled ONA or ONB VIN is applied VIN LDO is activated after VIN is applied VL 0.8 V VREF REF circuit is activated after VL becomes available After VREF goes above 0.8 V, the converter is turned on
OSC EN (Sysmon EN) Oscillator is activated OSC 4 ms Slow soft-start gradually increases the maximum inductor current
fmax (SS)
DH
DL
FIGURE 3. Converter is Enabled After VIN is Applied, A or B Controllers
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
New Product
TIMING DIAGRAMS
Vishay Siliconix
VIN
[ V (VL)
VIN is removed VL 4V 3.4 V LDO Deactivated after VIN is removed RESET
VREF
OSC EN (Sysmon EN)
Oscillator disabled
OSC
DH
DL
fmax (SS)
FIGURE 4. Power Off Sequence
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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Si9139
Vishay Siliconix
New Product
DETAILED FUNCTIONAL BLOCK DIAGRAMS
FB_ CS_ FB_ RX
+ 1X_
Internal Reference +
Error Amplifier PWMCMP + Pulse Skipping Control 20 mV Current Limit DL Logic Control LX_ BBM VL DL ONA or ONB DH BST_ DH
RY
SLC
V Soft-Start t SYNC Rectifier Control
FIGURE 5. Buck Block Diagram (SMPS A and B Controllers)
FBC
R2
Error Amplifier 1.24-V + + COMP SLC C/S Amplifier CSP CSN + 100 mV +
ONB PWM Comparator Logic Control BSTC DH LXC
R3
DHC VL Pulse Skipping Control DL DLC
Current Limit V Soft-Start t
FIGURE 6. Buck-Boost Block Diagram (Auxiliary SMPS Controller C)
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
New Product
DETAILED FUNCTIONAL BLOCK DIAGRAMS
5-V Linear Regulator Enable A SMPS Controller 4V Good A FBA CSA BSTA DHA LXA DLA
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VIN
VL
Enable 3.3-V Reference 2.4 V B SMPS Controller Good B ONA ONB Enable Auxiliary 1.2- to 20-V Adjustable Buck-Boost Controller C
FBB CSB BSTB DHB LXB DLB
Reset Handler
FBC CSP CSN BSTC DHC LXC DLC
RESET
FIGURE 7. Complete Si9139 Block Diagram
DESCRIPTION OF OPERATION
Shutdown Mode The logic threshold for the ONA and ONB pins is 1.6 V. Input voltage must be 0.8 V or less for logic low and 2.4 V or higher for logic high. Start-up Sequence Start-up is controlled by individual ON/OFF control. The A output is controlled by ONA whilst the B and the C adjustable outputs are both controlled by ONB. When both the A and B SMPS outputs are within tolerance and 32,000 clock cycles (typically equal to 107 ms) have elapsed since the second SMPS output went into regulation, the RESET pin will go high, signifying that all converters are operating correctly (see RESET Power Good Voltage Monitor). The Si9139 converts a 4.5-V to 30-V input voltage to five different output voltages; two buck (step-down) high current, PWM, switch-mode supplies of 1.5-V to 3.3-V, one "Buck-Boost" PWM switch-mode supply adjustable from 1.24 V to 20 V, one precision 3.3-V reference and one 5-V low drop out (LDO) linear regulator output. Switch-mode supply output current capabilities depend on external components (can be selected to exceed 10 A). In the standard application circuit illustrated in Figure 1, each buck converter is capable of delivering 5 A, with the buck-boost converter delivering 500 mA.
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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Si9139
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DESCRIPTION OF OPERATION (CONT'D)
Buck Converter Operation: Converters A and B The A and B buck converters are both current-mode PWM and PSM (during light load operation) regulators using high-side bootstrap n-channel and low-side n-channel MOSFETs. At light load conditions, the converters switch at a lower frequency than the clock frequency. This operating condition is defined as pulse-skipping. The operation of the converter(s) switching at clock frequency is defined as normal operation. Normal Operation PWM: Buck Converters A and B In normal operation, the buck converter high-side MOSFET is turned on with a delay (known as break-before-make time tBBM), after the rising edge of the clock. After a certain on time, the high-side MOSFET is turned off and then after a delay (tBBM), the low-side MOSFET is turned on until the next rising edge of the clock, or the inductor current reaches zero. The tBBM (approximately 25 ns to 60 ns), has been optimized to guarantee the efficiency is not adversely affected at the high switching frequency and a specified minimum to account for variations of possible MOSFET gate capacitances. During the normal operation, the high-side MOSFET switch on-time is controlled internally to provide excellent line and load regulation over temperature. Both buck converters have load, line, regulation to within 1.0% tolerance. Pulse Skipping Operation: Buck Converters A and B When the buck converter switching frequency is less than the internal clock frequency, its operation mode is defined as pulse skipping mode. During this mode, the high-side MOSFET is turned on until VCS-VFB reaches 20 mV, or the on time reaches its maximum duty ratio. After the high-side MOSFET is turned off, the low-side MOSFET is turned on after the tBBM delay, which will remain on until the inductor current reaches zero. The output voltage will rise slightly above the regulation voltage after this sequence, causing the controller to stay idle for the next clock cycle, or several clock cycles. When the output voltage falls slightly below the regulation level, the high-side MOSFET will be turned on again at the next clock cycle. With the converter remaining idle during some clock cycles, the switching losses are reduced preserving conversion efficiency during the light output current condition. Current Limit: Buck Converters When the buck converter inductor current is too high, the voltage across pin CS3 and pin FB will exceed the 125 mV In buck-boost operation mode, the two MOSFETs are turned on at the rising edge of the clock, and then turned off. The on time is controlled internally to provide excellent load, line, and temperature regulation. The Buck-Boost converter has load, line and temperature regulation well within 5%. Auxiliary Converter C Buck-Boost Converter Pulse Skipping Operation: current limit threshold, causing the high-side MOSFET to be turned off instantaneously regardless of the input, or output condition. The Si9139 features clock cycle by clock cycle current limiting capability. Auxiliary Converter C Operation: Buck-Boost Operation The Si9139 has an auxiliary adjustable 1.24-V to 20-V output non-isolated buck-boost converter, called for brevity a Buck-Boost. The input voltage range can span above or below the regulated output voltage. It consists of two n-channel MOSFET switches that are turned on and off in phase, and two diodes. Similar to the buck converter, during the light load conditions, the Buck-Boost converter will switch at a frequency lower than the internal clock frequency, which can be defined as pulse skipping mode (PSM); otherwise, it operates in normal PWM mode. The output voltage of the Buck-Boost converter is set by two resistors (R5 and R6, see Figure 1.A) where,
(R 5 ) R6) R6
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V OUT +
C
V FB
Auxiliary Converter C Normal Operation: Buck-Boost Mode
Under the light load conditions, similar to the buck converter, the Buck-Boost converter will enter pulse skipping mode. The MOSFETs will be turned on until the inductor current increases to such a level that the voltage across the pin CSP and pin CSN reaches 360 mV, or the on time reaches the maximum duty cycle. After the MOSFETs are turned off, the inductor current will conduct through two diodes until it reaches zero. At this point, the Buck-Boost converter output will rise slightly above the regulation level, and the converter will stay idle for one or several clock cycle(s) until the output falls back slightly below the regulation level. The switching losses are reduced by skipping pulses preserving the efficiency during light load.
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Document Number: 71841 S-22317--Rev. A, 16-Dec-02
Si9139
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DESCRIPTION OF OPERATION (CONT'D)
Auxiliary Converter C Normal Operation: Boost Mode The auxiliary converter may be operated in boost mode as shown in Figure 1.B when operating from a 5 V"10% input supply voltage. This ability reduces the component count of the converter and provides a high efficiency output voltage of in the range of 6 V to 20 V at up to10 W of power. Operation is similar to the buck-boost mode described above. Auxiliary Converter C Normal Operation: Buck Mode The auxiliary converter may also be operated in buck mode as shown in Figure 1.C when operating from a 5 V"10% input supply voltage. This ability reduces the component count of the converter and provides a high efficiency output voltage of in the range of 1.24 V to 2.1 V with 1 W of power. Operation is similar to the buck-boost mode described above. Auxiliary Converter C Current Limit Similar to the buck converter; when the voltage across pin CSP and pin CSN exceeds 360-mV typical, the two MOSFETs will be turned off regardless of the input and output conditions. Grounding: There are two separate grounds on the Si9139, analog signal ground (GND) and power ground (PGND). The purpose of two separate grounds is to prevent the high currents on the power devices (both external and internal) from interfering with the analog signals. The internal components of Si9139 have their grounds tied (internally) together. These two grounds are then tied together (externally) at a single point, to ensure Si9139 noise immunity. This separation of grounds should be maintained in the external circuitry, with the power ground of all power devices being returned directly to the input capacitors, and the small signal ground being returned to the GND pin of Si9139. RESET Handler The power-good monitor generates a system RESET signal. At first power-up (ONA/B going high), RESET is held low until the A and B outputs are in regulation and beyond the UVLO timer. At this point, an internal timer begins counting oscillator pulses and RESET continues to be held low until 32,000 cycles have elapsed. After this timeout period, 107 ms @ 300 kHz, RESET is actively pulled up to VL, when the recommended 20-kW resistor to VL is on the RESET pin. Other Outputs The Si9139 also provides a 3.3-V reference which can be externally loaded up to 1 mA, as well as, a 5-V LDO output which can be loaded up to 30 mA, or even more depending on the system application. For stability, the 3.3-V reference output requires a 1-mF capacitor, and the 5-V LDO output requires a 10-mF capacitor. Output Overvoltage Protection The A and B SMPS outputs are monitored for overvoltage. If either output is more than 10% above the nominal regulation point, all low-side gate drivers are latched high until ONA and ONB are toggled. This action turns on the synchronous rectifier MOSFETs with a 100% duty cycle, in turn rapidly discharging the output capacitors and forcing all SMPS outputs to ground. Output Undervoltage Protection In Si9139, each of the A and B SMPS outputs has an undervoltage protection circuit that is activated 6,144 clock cycles (20.48 ms) after the SMPS is enabled. If either SMPS output is typically under 70% of the nominal value, all SMPSs are latched off and their outputs are clamped to ground by the synchronous rectifier MOSFETs. The SMPS will not restart until both ONA and ONB are toggled. Stability: Buck Converters: In order to simplify designs, the A and B supplies do not require external frequency compensation. Meanwhile, it achieves excellent regulation and efficiency. The converters are current mode control, with a bandwidth substantially higher than the LC tank dominant pole frequency of the output filter. To ensure stability, the minimum capacitance and maximum ESR values are:
C LOAD w V REF 2p x
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V OUT x R CS x BW
ESR v
V OUT x Rcs V REF
where VREF = 3.3 V, VOUT is the output voltage (A or B), Rcs is the current sensing resistor in ohms and BW = 50 khz. With the components specified in the application circuit (L = 10 mH, RCS = 0.02 W, COUT = 330 mF, ESR approximately 0.1 W), the converter has a bandwidth of approximately 50 kHz, with minimum phase margin of 65_, and dc gain above 50 dB.
Document Number: 71841 S-22317--Rev. A, 16-Dec-02
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